The present invention relates to a frequency multiplier capable of generating a multiple output without feedback control (by non-feedback control). More specifically, the present invention relates to a frequency multiplier for use in a clock generator of a microcomputer, a DSP (digital signal processor) and the like.
Conventionally an N multiplier using a PLL (phase locked loop) circuit has been known well as a frequency multiplier.
FIG. 1 shows an example of an arrangement of a generally-used N multiplier employing a PLL circuit. The N multiplier includes a voltage control oscillator 101, an N frequency divider 102, a phase comparator 103 and a low-pass filter 104. The N multiplier performs feedback control to cancel a phase difference between a reference signal Fin and an output of the N frequency divider 102. Finally, the voltage control oscillator 101 generates an output signal Fout whose frequency is N times as high as that of the reference signal Fin. In other words, the oscillation frequency of the voltage control oscillator 101 is varied by a control voltage output from the low-pass filter 104. The N frequency divider 102 supplies the phase comparator 103 with a signal obtained by N-dividing an output of the voltage control oscillator 101. The phase comparator 103 supplies the low-pass filter 104 with an error signal corresponding to a phase difference between the reference signal Fin and the rising (or falling) edge of a signal output from the N frequency divider 102. The low-pass filter 104 extracts only the DC components from the error signal output from the phase comparator 103 and generates a control voltage for controlling the oscillation frequency of the voltage control oscillator 101.
In the above-described conventional N multiplier using a PLL circuit, however, it was necessary to optimize and adjust the low-pass filter 104 such that a control loop could be constantly stabilized in accordance with both a frequency of the reference signal Fin and an oscillation gain of the voltage control oscillator 101. For this reason, the low-pass filter 104 had to be optimized every time the frequency of the reference signal Fin was varied or the oscillation gain of the voltage control oscillator 101 was changed with manufacturing variations.
If, moreover, the components of capacitors and resistors used in the low-pass filter 104 are built in an LSI (large scale integrated circuit), a very large area is needed and, in this case, the manufacturing variations of the components have to be taken into consideration. On the other hand, if the components of capacitors and resistors are mounted externally, a special-purpose terminal is required. Thus, the low-pass filter 104 is an obstacle to miniaturization of the N multiplier.